Tandem NonStop I

The Tandem NonStop I, originally marketed as the Tandem/16 or T/16, was a modular fault-tolerant computer designed for continuous transaction processing. Systems combined independent processor modules, private memory and duplicated communication paths so that work could continue when an individual component failed.

Processes communicated through messages and could be paired with a backup process on another processor. This hardware and software design made the machine especially suitable for banking, stock exchanges, telecommunications and other applications where interruption or lost transactions carried a high cost.

Notable Features
  • Systems were assembled from two to sixteen independent processor modules connected by dual Dynabus paths.
  • Each processor used a proprietary 16-bit stack architecture with virtual memory and message-oriented interprocessor communication.
  • Mirrored storage, dual controllers and multiple I/O paths extended fault tolerance beyond the CPUs.
Historical Significance
  • Introduced in 1976, it established the commercial NonStop architecture and Tandem’s reputation for high-availability transaction processing.
  • Its process-pair and shared-nothing design allowed individual hardware failures to be isolated without stopping the complete system.
Collector’s Notes
  • Complete systems occupied multiple cabinets and were normally customised for a customer, so configurations vary considerably.
  • Original processor boards, Dynabus hardware, disk controllers, cabinets and documentation are more representative than a single isolated module.

Specifications

Technical Information
NameTandem NonStop I
ManufacturerTandem Computers
LaunchedThursday, January 1, 1976
Discontinued1981
CountryUnited States
CPUTandem proprietary 16-bit stack processor
Units Sold
PowerRedundant, serviceable system power supplies; requirements depended on cabinet configuration
Fault ToleranceProcess pairs, fail-fast processor modules, dual buses, mirrored disks and online serviceability
Architecture16-bit stack-oriented TNS instruction set; shared-nothing multiprocessor design
NetworkingExpand networking joined geographically separated NonStop systems
Operating SystemGuardian operating system
Expansion / I/ODual Dynabus processor interconnect with redundant I/O paths
KeyboardExternal operator console terminal keyboard
StorageMirrored fixed disks, removable disks and magnetic tape through dual-ported controllers
SoundNo general-purpose sound hardware
GraphicsTerminal-oriented text output; no integrated graphics subsystem
DisplayExternal operator console terminal; no integrated display
ROMBoot, diagnostic and processor microcode storage; capacity varied by generation and configuration
RAMPrivate protected memory per processor; capacity depended on system configuration
CPU Speed100 ns processor cycle; approximately 0.7 MIPS per processor

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