The Tandem NonStop Cyclone/R introduced commercial MIPS RISC processors to the NonStop family while preserving compatibility with the proprietary TNS software base. Existing object code could be translated during installation or interpreted, allowing customers to migrate without rewriting applications.
Processor modules used redundant R3000 devices and Tandem checking logic to meet the company’s data-integrity requirements. Later native-mode NonStop Kernel software allowed new applications to exploit the RISC architecture directly.
| Technical Information | |
|---|---|
| Name | Tandem NonStop Cyclone/R |
| Manufacturer | Tandem Computers |
| Launched | Tuesday, January 1, 1991 |
| Discontinued | Mid-1990s |
| Country | United States |
| CPU | MIPS R3000 RISC processor modules |
| Units Sold | |
| Power | Redundant, serviceable system power supplies; requirements depended on cabinet configuration |
| Fault Tolerance | Redundant checked RISC processors, process pairs, dual paths and mirrored storage |
| Architecture | MIPS R3000 RISC implementation with TNS object-code translation |
| Networking | Expand networking, Ethernet and enterprise protocols |
| Operating System | NonStop Kernel; Guardian-compatible translated environment and later native MIPS mode |
| Expansion / I/O | Redundant NonStop system interconnect inherited from CLX/Cyclone components |
| Keyboard | External operator console terminal keyboard |
| Storage | Mirrored SCSI and Tandem disk subsystems with redundant paths |
| Sound | No general-purpose sound hardware |
| Graphics | Terminal-oriented text output; no integrated graphics subsystem |
| Display | External operator console terminal; no integrated display |
| ROM | Boot, diagnostic and processor microcode storage; capacity varied by generation and configuration |
| RAM | Protected private memory per processor; capacity varied by configuration |
| CPU Speed | MIPS R3000 clock varied by processor revision |
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